Embodiments of the present invention relate to a semiconductor device and a method for forming the same, and more particularly to a semiconductor device including a bit line spacer and a method for forming the same.
As the integration degree of a semiconductor device increases, the distance between lines is reduced and the thickness of the insulation film used to isolate a word line, a bit line, and a capacitor from each other is gradually reduced.
The reduction in thickness of the insulation film may increase parasitic capacitance (Cb), resulting in deterioration of semiconductor device characteristics.
In order to prevent parasitic capacitance from increasing, the thickness of the insulation film may be increased or a low dielectric constant (“low-k dielectric”) material may be used. However, when the thickness of the insulation film is increased, it becomes harder to fill a gap between the insulation films. In addition, a low dielectric film has a poor gap-fill characteristic.
In addition, as integration degree increases, the distance between patterns is gradually reduced. In the conventional art, various kinds of nitride film have been employed as an insulating film. However, since nitride material has a high dielectric constant, parasitic capacitance can occur.
FIGS. 1A and 1B illustrate a method for forming a semiconductor device according to the related art. A semiconductor device according to the related art will hereinafter be described with reference to FIGS. 1A and 1B.
Referring to FIG. 1A, a bit line 20 formed in a laminated structure of a bit line conductive material 15 and a hard mask layer 17 is formed over a semiconductor substrate 10. Subsequently, a spacer 25 is deposited over the entire surface of the semiconductor substrate 10, including the bit line 20. In this case, the spacer 25 is formed of a nitride film.
Referring to FIG. 1B, an interlayer insulation film (not shown) is formed over the entire surface of the semiconductor substrate 10 including the bit line 20 over which the spacer 25 is formed. Subsequently, the interlayer insulation film (not shown) and the spacer 25 formed over the semiconductor substrate 10 are etched to form a storage node contact hole where the semiconductor substrate 10 is exposed. After that, a polysilicon layer is buried in the storage node contact hole, and a planarization process is performed exposing the bit line 20 and forming a storage node contact 30.
As described above, since the spacer, which is formed over sidewalls of the bit line, is formed of a high-dielectric-constant nitride film, parasitic capacitance of the bit line is unavoidably increased, resulting in deterioration of characteristics of the semiconductor device.